Intel Tick-Tock

"Tick-Tock" is a model, developed by Ashwani Gupta of Jones Farm 5 (Hillsboro, Oregon) and adopted by chip manufacturer Intel Corporation since 2007 to follow every microarchitectural change with a die shrink of the process technology. Every "tick" is a shrinking of process technology of the previous microarchitecture and every "tock" is a new microarchitecture.[1] Every year, there is expected to be one tick or tock.[1]

Contents

Roadmap

Architectural change Codename Fabrication process Release date Processors
Enthusiast Desktop Mobile Marketing names
Tick Die shrink Presler, Cedar Mill, Yonah 65 nm January 5, 2006 Presler Cedar Mill Yonah
Tock New microarchitecture Core July 27, 2006[2] Kentsfield Conroe Merom
Tick Die shrink Penryn 45 nm November 11, 2007[3] Yorkfield Wolfdale Penryn
Tock New microarchitecture Nehalem November 17, 2008[4] Bloomfield Lynnfield Clarksfield
Tick Die shrink Westmere 32 nm January 4, 2010[5][6] Gulftown Clarkdale Arrandale
Tock New microarchitecture Sandy Bridge January 9, 2011[7] Sandy Bridge-EX Sandy Bridge-DT Sandy Bridge-NB
Tick Die shrink Ivy Bridge 22 nm Q2 2012
Tock New microarchitecture Haswell Q1 2013
Tick Die shrink Broadwell[8] 14 nm[9] 2014[5]
Tock New microarchitecture Skylake[8] 2015
Tick Die shrink Skymont[8] 10 nm [9] 2016
Tock New microarchitecture 2017

See also

References

External links